1. Field of Invention
The invention relates to a field emission display (FED), and more particularly to a field emission display with a quadrode structure.
2. Description of the Related Art
In a field emission display (FED), voltage is applied to a cathode and a gate electrode in a vacuum to create an electric field for inducing electrons at the tip of some material, and then the field-emitted electrons left from the cathode plate are accelerated toward the anode since positive voltage on the anode attracts, and collide with phosphors, thereby emitting luminescence.
Referring to FIG. 1, the FED has an anode plate 10 and a cathode plate 20 between which a vacuum cavity is formed. In the anode plate 10, an anode electrode layer 12 and a luminescent layer 13 are formed under a glass substrate 11 in order. In the cathode plate 20, a cathode electrode layer 22 is formed on a glass substrate 21, and a field-emitted array 23 having a two dimension distributions is disposed on the cathode electrode layer 22. On each array unit is disposed a gate layer 24 having a hole 25, inside which there is a metallic taper on the cathode electrode layer 22, and the gate layer 24 and the sides of the metallic taper are separated by an insulation layer 26. Due to the array properties for a conventional field emission display, the structure needs to be implemented through expensive lithography and deposition, and the sizes of finished displays are seriously limited. Therefore, new materials and new processes have been developed.
As shown in FIG. 2, an FED, disclosed in U.S. Pat. No. 6,359,383, not only utilizes a nanotube instead of conventionally electronic emitter, but also provides a new structure of the FED. It includes an anode plate 30, a cathode plate 40 separated from the anode plate 30 and comprising a cathode electrode layer 41, a resistive layer 42 and a nanotube emitter 43, which is disposed on the top layer of the cathode plate 40 to perform the field emission, in sequence, an insulation substrate 50 on which the cathode plate 40 is disposed, a gate layer 60 disposed at two sides of the nanotube emitter 43 on the cathode plate 40, and a dielectric substrate 70 separating the cathode plate 40 from the gate layer 60. The FED with the above-mentioned structure can be implemented through a simple thin film printing technique that reduces cost. However, it is necessity to find a preferable solvent if the driving voltage of the FED is reduced further to accelerate the development of the driving system.
Furthermore, as shown in FIG. 3—the FED disclosed in U.S. Pat. No. 6,359,383—besides having three electrodes (i.e. a cathode 80, a gate electrode 82 and an anode [not shown]) as in prior art, it has a fourth electrode (i.e. a focus electron 84) above a gate electrode 82 for focusing electrons to improve the problem of diverging the electron beam, (thereby preventing power consumption such as to use lower driving voltage.)—(this makes no sense) However, in this case, there is a problem that the electrode may release current in the dark. Therefore, the image quality for the FED needs to be improved.